All systems have memory. Join this memory interface training course to completely understand memory interface design, how to make a great layout, how to optimize performance, and how to troubleshoot it. Significant performance benefits are possible when you master the details of memory interface design.
With every new generation of DDR, margins are getting smaller and the requirements are harder to meet. The memory interface is more and more a „Black Box“. You need to understand this to get the most out of it.
This course will bring you back in control with a full understanding of everything that goes on in the memory interface. The what, why, and how of memory design. We also include practical measurements and how to qualify a memory design using a modern oscilloscope and what to watch out for when using built-in wizards and design guides.
Based on feedback from previous participants, we have expanded the course to have enough time to fully cover the subject.
Next public class:
Copenhagen, DK, Feb 19, 2024
Munich, DE, Feb 26, 2024
This face-to-face course runs with a late start on the first day and an early finish on the last day to support various travel arrangements:
- Day 1 runs 10:00 to 17:00
- Day 2 runs 9:00 to 16:00
- Day 3 runs 8:30 to 15:30
Hope this works for you.
The following topics (and more) are included in the handout. During the course, we will focus more on the topics important to the participants. Depending on the feedback and your questions/discussions, we will allocate time to cover all the important parts.
- Inside the memory: What‘s inside the components?
- Basic commands: How to access the DDR memory?
- DRAM Specification
- Application Test for Memory
- Understanding DIMM’s
- Routing and Layout: Real-world implementation
- Focus technologies are (LP)DDR4 and (LP)DDR5. Some retrospect to DDR3 (and before) is included as well
- Signal and power integrity (SI/PI)
- S-Parameter: How to read data in the frequency domain?
- Compliance testing and what to watch out for
- ECC: How does it work and how to test it?
The course language is English. Hermann will take questions and offline discussions in German as well.
Why take a course on memory interface design?
For all systems, the memory interface design is one of the key elements to get right. This is often the highest density routing on the board. And also has the most complex interface.
The course assumes knowledge of digital design at the PCB level. No advanced math is required.
What is included
- Live demos on high-end equipment
- Very comprehensive material in PDF format
- Signed course certificate
- A limit of 25 participants
Price per participant for the face-to-face course: €2400.
Hermann Ruckerbauer is a consultant and owner of EyeKnowHow. Before founding EyeKnowHow, Hermann worked with dynamic memory design and memory interface design at Qimonda AG, Infineon Technologies, and Siemens/Infineon for many years and worked with JEDEC for the definition of new dynamic memory standards.
This course is organized in partnership with Rohde & Schwarz. We will use R&S equipment for live demos. This partnership makes it possible for us to do live demos using the latest and greatest equipment. We do not allow partners to otherwise influence the course content.