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Reduce debugging and troublesome bring-up phases by understanding and designing for signal and power integrity. Learn both theory and practical tips, and do hands-on simulations to see the effects right away.
Live Online 5 half-days, Oct 26, 2020
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Available world wide as public course or private on-site. Driven by your needs.
Join this course to completely understand memory interface design, how to make a great layout, how to optimize the performance, and how to troubleshoot it. Enjoy significant performance benefits when you master the details of memory interface design.
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This course teaches you how to increase productivity by enhancing VHDL coding and application skills. Presented in two distinct course modules, Expert VHDL focuses on language and synthesis issues, design maintainability and re-use, test benches and the latest techniques for verification - including an introduction to OVL/PSL and modern assertion-based approaches to verification. See More.
"No matter what field you work in, the course has a great span and everybody will learn something!" - Anna Johansson
"Engineers need to know this stuff!" - Carl-Johan Larsson
"The trainer is an expert and the topic is very useful as you get all the critical points in a short time." - Salvodor Tropea
Rolf V. Ostergaard
+45 2684 4876
“Training worth attending more than pays for itself in added value for you and your project”
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