Some of the EE-Training courses use the Cadence SigXplorer tool, which is a very handy IBIS*) simulator. I have previously written about other similar tools like the simulator-part of Altium and Mentor’s Hyperlynx. It’s not really important what tool you use, it’s more how you use it and what you do with the results.
IBIS simulators are great for digital circuits, as most digital parts have IBIS models you can download from the manufacturer’s websites. The models only describe one single output or input, so the simulations tend to very simple which is another great thing. Simple means you can actually understand what is going on 🙂
Here is a simple 4-minute video demo I did for one of my courses, where you can see how to find a parallel termination resistor value and how to understand some “strange” bumps in the waveform. A very simple Cadence SigXplorer simulation with a slightly unexpected result.
Finding a parallel termination resistor value may be about the most boring example, as you will always find the ideal value is one that matches the trace impedance. In the real world, trace impedance will have a production tolerance. Assume around +/-10%, and more for a plated layer (outer layers, etc.). When picking the termination resistor value, you will normally want to pick a slightly lower value to make sure there is no undershoot. The effect of tolerances is another good thing to simulate at least once to understand what really matters.
*) IBIS = Input/Output Buffer Information Specification (read also the IBIS FAQ)
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