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Lee Ritchey SI Courses Updated

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Lee_Ritchey_Book_FaceWe just updated all the descriptions of the Lee Ritchey courses in the Copenhagen SI Week coming up in May. Now you actually get the best content of 3 different courses merged into the two courses. All very important stuff if you are serious about designing boards for modern (digital) electronics.

A good chunk of the previously separate “Very High Speed” course on managing high speed differential data paths to 32+ GBps is now merged into the 3|4-day Signal Integrity course we run Mon-Wed/Thu. And the Stackup Design course is improved with more important information learned from the latest test boards.

So, please review the updated descriptions. And sign up – or get your best colleagues signed up asap!

SI Week 2016 – Time to Sign Up!

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We are proud to host the full SI Week 2016 in Copenhagen for the first time. A full week of signal integrity training at the best level possible. A huge success in Stockholm for the last 3 years. Lee Ritchey is coming from California to do a new and revised version of the fundamental and… Read more

Double-up on SI Training in December

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Just a quick note to let you know about two upcoming SI courses in December: Oslo (Asker), NO: December 1-3, 2015 London (Ringwood), UK: December 8-10, 2015 Lots of opportunity to learn how to get ahead – without going overboard. SI is important, but do it right so you don’t spend too much on simulation… Read more

What can go wrong in DDR interface designs?

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How many memory interface mistakes are there to make? There is one saying I like very much: ”Don’t make the same mistake twice”. There are enough mistakes to make that you probably don’t have time to try them all even once. In memory interface design there are still enough mistakes left to make… But just… Read more

Hermann Ruckerbauer Announces a Brand New 1-day Course

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As briefly mentioned before, Hermann Ruckerbauer will be teaching a brand new 1-day course: PCIe PHY Test. The main purpose of the training is to help you understand the methodologies and the test errors in Physical Layer testing for PCIe. Time & Place The course will take place right after Hermann’s very popular Open the Black Box of… Read more