New course: FPGA Development Best Practices

Learn to tackle complex FPGA designs

We are adding a new course (actually more than one, but more about that later): FPGA Development Best Practices by Espen Tallaksen from Bitvis/Norway. And you thought EE-Training was all about signal-integrity? 🙂 Well the fact of the matter is that FPGA ties in very well with SI. Whenever you have a serious FPGA design, you may very well also have some serious SI concerns. So it makes perfect sense for me to invite Espen down from Oslo to do a fairly unique 3 day course in how you really should tackle complex FPGA designs.

As this illustration shows, it’s quite different from what most other courses on the market teaches you:

Espen compares his course to the other courses on the market from tool vendors, FPGA vendors and the more “elite” independent vendors like Doulos and Esperan. As you can see, the focus is on all the other subjects, that really matter when you get serious about FPGA design. If you have ever worked side by side with ASIC developers turned FPGA developers, you may recognize some of that focus.

Sign up

Sign up fast, as the course is running March 24-26, 2015 🙂 Sorry for the late notice, but we know you will love it. Read much more about the course and go straight to sign-up. We have a max of 20 participants for this intensive course.

We have secured a new very nice training facility in Ørestaden close to the airport and Metro, so this should be very convenient for both public transport and for those that want to drive. We start late the first day and finish early the last day, making it even more convenient for those that come from far away.