I have arranged for Hermann Ruckerbauer to come to Copenhagen in September (24+25) to teach his course in memory design. He has a background in dynamic memory chip design at Qimonda and Infinion and has followed the JEDEC group for many years. Today he runs courses and does consulting on optimal board level memory design, layout and verification.
This is the second time I work with Hermann on this course, so I know it’s worth going to. Now I just have to convince you 🙂
We have the first half of the signups in already, so the course is guaranteed to run and with a location only 5 minutes from Copenhagen Central Station you can fly in or take the train from many places. We even offset the start time to 10:00 first day and finish early on the second day so most of Europe can fly in and only need one hotel night.
So if you have memory as part of your typical designs, whether DDR 1, 2, 3 or 4 – take a close look at this course and sign up asap:
M.Sc.EE, SI Consultant